• AHDL-II single/dual-channel serial input convert to 8-lane LVDS data + 2 clock lane video output 
• Supports Pixel Clock fastest at 150MHz. 1080P RGB888.
• Single AHDL-II link up to 150MHz Pixel Clock 1080P RGB888
• Dual AHDL-II link up to 300MHz Pixel Clock 3KP RGB888
• Fast GPIO to support SPI control signal pass through
• Multiple Functional Modes for system application
• Enables transmission of high-speed video , bi-directional control data and power over a single Coax or shielded-twisted pair (STP) cable
• CDR on receiver with no external source of reference clock required 
• Multiple GPIO better supports touchscreen application
• Adjustable Spread Spectrum input for EMI reduction
• Multiple EQ supports long distance cable transmission 
• Supports 7.1 High-Definition Surround Sound audio applications with low output jitter
• Error Detection/Correction(ECC/CRC) of Video/Control Data
• 3.3V and 1.1V power supply, IO supports 1.8V and 3.3V 
• Build In Self Test (BIST) and on-chip video pattern generator for system diagnostics
• AEC-Q100 Grade 2 qualified and ESD protection
• 64-Pin (9mm*9mm) QFN package
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